Operating Range:
Up to 40 MIPS operation (at 3.0-3.6V):
Industrial temperature range (-40°C to +85°C)
Extended temperature range (-40°C to +125°C)
High temperature range (-40°C to +150°C)
High-Performance DSC CPU:
Modified Harvard architecture
C compiler optimized instruction set
16-bit wide data path
24-bit wide instructions
Linear program memory addressing up to 4M instruction words
Linear data memory addressing up to 64 Kbytes
83 base instructions: mostly 1 word/1 cycle
Two 40-bit accumulators with rounding and saturation options
Flexible and powerful addressing modes:
Indirect
Modulo
Bit-Reversed
Software stack
16 x 16 fractional/integer multiply operations
32/16 and 16/16 divide operations
Single-cycle multiply and accumulate:
Accumulator write back for DSP operations
Dual data fetch
Up to ±16-bit shifts for up to 40-bit data
On-Chip Flash and SRAM:
Flash program memory
Data SRAM
Boot, Secure, and General Security for program Flash
Direct Memory Access (DMA):
8-channel hardware DMA
Up to 2 Kbytes dual ported DMA buffer area (DMA RAM) to store data transferred via DMA:
Allows data transfer between RAM and a peripheral while CPU is executing code (no cycle stealing)
Most peripherals support DMA
Timers/Capture/Compare/PWM:
Timer/Counters, up to five 16-bit timers:
Can pair up to make two 32-bit timers
One timer runs as a Real-Time Clock with an external 32.768 kHz oscillator
Programmable prescaler
Input Capture (up to four channels):
Capture on up, down or both edges
16-bit capture input functions
4-deep FIFO on each capture
Output Compare (up to four channels):
Single or Dual 16-bit Compare mode
16-bit Glitchless PWM mode
Hardware Real-Time Clock/Calendar (RTCC):
Provides clock, calendar, and alarm functions
Interrupt Controller:
5-cycle latency
118 interrupt vectors
Up to 53 available interrupt sources
Up to three external interrupts
Seven programmable priority levels
Five processor exceptions
Digital I/O:
Peripheral pin Select functionality
Up to 35 programmable digital I/O pins
Wake-up/Interrupt-on-Change for up to 21 pins
Output pins can drive from 3.0V to 3.6V
Up to 5V output with open drain configuration
All digital input pins are 5V tolerant
4 mA sink on all I/O pins
System Management:
Flexible clock options:
External, crystal, resonator, internal RC
Fully integrated Phase-Locked Loop (PLL)
Extremely low jitter PLL
Power-up Timer
Oscillator Start-up Timer/Stabilizer
Watchdog Timer with its own RC oscillator
Fail-Safe Clock Monitor
Reset by multiple sources
Power Management:
On-chip 2.5V voltage regulator
Switch between clock sources in real time
Idle, Sleep, and Doze modes with fast wake-up
Analog-to-Digital Converters (ADCs):
10-bit, 1.1 Msps or 12-bit, 500 Ksps conversion:
Two and four simultaneous samples (10-bit ADC)
Up to nine input channels with auto-scanning
Conversion start can be manual or synchronized with one of four trigger sources
Conversion possible in Sleep mode
±2 LSb max integral nonlinearity
±1 LSb max differential nonlinearity
Audio Digital-to-Analog Converter (DAC):
16-bit Dual Channel DAC module
100 Ksps maximum sampling rate
Second-Order Digital Delta-Sigma Modulator
Comparator Module:
Two analog comparators with programmable input/output configuration
CMOS Flash Technology:
Low-power, high-speed Flash technology
Fully static design
3.3V (±10%) operating voltage
Industrial and Extended temperature
Low power consumption
Motor Control Peripherals:
6-channel 16-bit Motor Control PWM:
Three duty cycle generators
Independent or Complementary mode
Programmable dead time and output polarity
Edge-aligned or center-aligned
Manual output override control
One Fault input
Trigger for ADC conversions
PWM frequency for 16-bit resolution (@ 40 MIPS) = 1220 Hz for Edge-Aligned mode, 610 Hz for Center-Aligned mode
PWM frequency for 11-bit resolution (@ 40 MIPS) = 39.1 kHz for Edge-Aligned mode, 19.55 kHz for Center-Aligned mode
2-channel 16-bit Motor Control PWM:
One duty cycle generator
Independent or Complementary mode
Programmable dead time and output polarity
Edge-aligned or center-aligned
Manual output override control
One Fault input
Trigger for ADC conversions
PWM frequency for 16-bit resolution (@ 40 MIPS) = 1220 Hz for Edge-Aligned mode, 610 Hz for Center-Aligned mode
PWM frequency for 11-bit resolution (@ 40 MI
Parameter Name | Value |
Architecture | 16-bit |
CPU Speed (MIPS) | 40 |
Memory Type | Flash |
Program Memory (KB) | 128 |
RAM Bytes | 16,384 |
Temperature Range C | -40 to +125 |
Operating Voltage Range (V) | 3 to 3.6 |
I/O Pins | 35 |
Pin Count | 44 |
System Management Features | BOR |
POR | Yes |
WDT | Yes |
Internal Oscillator | 7.37 MHz, 32.768 kHz |
nanoWatt Features | Fast Wake/Fast Control |
Digital Communication Peripherals | 2-UART 2-SPI 1-I2C |
Analog Peripherals | 1-A/D 9×12-bit @ 500(ksps) 2-D/A 2×16-bit @ 100(ksps) |
Comparators | 2 |
CAN (#, type) | 1 CAN |
Capture/Compare/PWM Peripherals | 4/4 |
PWM Resolution bits | 16 |
Motor Control PWM Channels | 8 |
Quadrature Encoder Interface (QEI) | 2 |
Timers | 5 x 16-bit 2 x 32-bit |
Parallel Port | PMP |
Hardware RTCC | 1 |
DMA | 8 |
Cap Touch Channels | 9 |