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C Compiler optimized architecture/instruction set
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Data EEPROM to 1024 bytes
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Linear program memory addressing to 64 Kbytes
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Linear data memory addressing to 4 Kbytes
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Up to 16 MIPS operation
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16-bit wide instructions, 8-bit wide data path
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Priority levels for interrupts
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31-level, software accessible hardware stack
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8 x 8 Single-Cycle Hardware Multiplier
High Performance RISC CPU:
Core Size | 8-Bit |
Speed | 64MHz |
Peripherals | Brown-out Detect/Reset, HLVD, POR, PWM, WDT |
Number of I/O | 24 |
Program Memory Size | 8KB (4K x 16) |
Program Memory Type | FLASH |
EEPROM Size | 256 x 8 |
RAM Size | 512 x 8 |
Voltage – Supply | 2.3 V ~ 5.5 V |
Data Converters | A/D 19x10b |
Operating Temperature Range | -40°C ~ 85°C |
Package / Case | 28-DIP (0.300″, 7.62mm) |