The CD74HC390 and ’HCT390 dual 4-bit decade ripple counters are high-speed silicon-gate CMOS devices and are pin compatible with low-power Schottky TTL (LSTTL). These devices are divided into four separately clocked sections. The counters have two divide-by-2 sections and two divideby-5 sections. These sections are normally used in a BCD decade or bi-quinary conﬁguration, since they share a common master reset (nMR). If the two master reset inputs (1MR and 2MR) are used to simultaneously clear all 8 bits of the counter, a number of counting conﬁgurations are possible within one package. The separate clock inputs (n CP0 and n CP1) of each section allow ripple counter or frequency division applications of divide-by-2, 4. 5, 10, 20, 25, 50 or 100. Each section is triggered by the High-to-Low transition of the input pulses (nCP0 and nCP1).
|Logic Type||Counter, Decade|
|Number of Circuits||2|
|Number of Inputs||4|
|Current – Quiescent (Max)||35MHz|
|Operating Temperature||-55°C ~ 125°C|
|Package / Case||16-DIP (0.300″, 7.62mm)|