The flip-flop has independent data, preset, clear, and clock inputs and Q and Q outputs. The logic level present at the data input is transferred to the output during the positive going transition to the clock pulse. Preset and clear are independent of the clock and accomplished by a low level at the appropriate input.
|Voltage – Supply||–0.5 to 7.0|
|Current – Quiescent (Max)||CC (static) = 2 µA max (Ta = 25°C)|
|Current – Output High, Low||1 µA max|
|Package / Case||DIP 14|