DSPIC30F6010A-30I/PF

IC DSC 16BIT 144KB FLASH 80TQFP
High-Performance Modified RISC CPU:
• Modified Harvard architecture
• C compiler optimized instruction set architecture
with flexible Addressing modes
• 83 base instructions
• 24-bit wide instructions, 16-bit wide data path
• 144 Kbytes on-chip Flash program space
(Instruction words)
• 8 Kbytes of on-chip data RAM
• 4 Kbytes of nonvolatile data EEPROM
• Up to 30 MIPS operation:
– DC to 40 MHz external clock input
– 4 MHz-10 MHz oscillator input with
PLL active (4x, 8x, 16x)
– 7.37 MHz internal RC with PLL active
(4x, 8x, 16x)
• 44 interrupt sources:
– Five external interrupt sources
– Eight user selectable priority levels for each
interrupt source
– Four processor trap sources
• 16 x 16-bit working register array
 
Datasheet… Core Processor
dsPIC
Core Size
16-Bit
Program Memory Size
144KB (48K x 24)
Program Memory Type
FLASH
Voltage – Supply (Vcc/Vdd)
2.5 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Package / Case
80-TQFP