Operating Range• DC – 40 MIPS (40 MIPS @ 3.0-3.6V, -40° to +85°C)• Industrial temperature range (-40° to +85°C)High-Performance DSC CPU• Modified Harvard architecture• C compiler optimized instruction set• 16-bit wide data path• 24-bit wide instructions• Linear program memory addressing up to 4Minstruction words• Linear data memory addressing up to 64 Kbytes• 84 base instructions: mostly 1 word/1 cycle• Sixteen 16-bit general purpose registers• Two 40-bit accumulators:- With rounding and saturation options• Flexible and powerful addressing modes:- Indirect, modulo and bit-reversed• Software stack• 16 x 16 fractional/integer multiply operations• 32/16 and 16/16 divide operations• Single-cycle multiply-and-accumulate:- Accumulator write back for DSP operations- Dual data fetch• Up to +/- 16-bit shifts, for up to 40-bit dataDirect Memory Access (DMA)• 8-channel hardware DMA• Allows data transfer between RAM and aperipheral while CPU is executing code (no cyclestealing)• 2 KB of dual-ported DMA buffer area (DMA RAM)to store data transferred via DMA• Most peripherals support DMADatasheet  Core Processor
Core Size
Program Memory Size
256KB (256K x 8)
Program Memory Type
Voltage – Supply (Vcc/Vdd)
3 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Package / Case
RAM Size
30K x 8